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this is information on a product in full production. october 2013 docid025373 rev 1 1/16 RHFLVDS228A rad-hard, dual 4x4 crosspoint switch lvds datasheet - production data features ? lvds input/output ? multiple configuration: mux, repeater and splitter ? ansi tia/eia-644 compliant ? 400 mbps lvds (200 mhz) ? 200 mhz clock channel ? cold spare on all pins ? fail-safe function ? 3.3 v operating power supply ? 4.8 v absolute rating ? hermetic package ? power consumption: 220 mw at 3.3 v ? large input common mode: -4 v to +5 v ? guaranteed up to 300 krad tid ? sel immune up to 135 mev.cm2/mg ? set/seu immune up to 22 mev.cm2/mg description the RHFLVDS228A is an 8-channel, 4x4 crosspoint switch base, on low voltage differential signaling (lvds) for low-power and high-speed communications. the two 4x4 multiplexers allow connection from any of the four inputs to any of the four outputs. packaged and qualified for use in aerospace environments in a low-power, fast-transmission standard, the RHFLVDS228A operates at 3.3 v power supply (3.6 v max. operating and 4.8 v amr) and a common mode of -4 v to +5 v. the lvds outputs operate over a controlled impedance of 100-ohm transmission media that may be printed circuit board traces, back planes, or cables. the circuit features an intern al fail-safe function to ensure a known state in case of an input short circuit or a floating input. all pins have cold spare buffers to ensure they are in high impedance when v cc is tied to gnd. the RHFLVDS228A can operate over a wide temperature range of -55 c to +125 c and it is housed in an hermetic ceramic flat-64 package. ceramic flat-64 the upper metallic lid is electrically connected to ground. table 1. device summary reference smd pin quality level package lead finish mass eppl (1) 1. eppl = esa preferred part list temp. range RHFLVDS228Ak1 - engineering model ceramic flat-64 gold - - -55 c to 125 c RHFLVDS228Ak01v (2) 2. not yet in full production tbd qml-v flight target www.st.com
contents RHFLVDS228A 2/16 docid025373 rev 1 contents 1 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings and operati ng conditions . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1 ceramic flat-64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8 shipping information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
docid025373 rev 1 3/16 RHFLVDS228A functional description 16 1 functional description note: 1 a floating sl pin is equi valent to a low logic level 2 channels 5, 6, 7, and 8 behave like chann els 1, 2, 3 and 4 respectively (see also figure 1 ) note: vid = (vin+)-(vin-), l = low level, h = high level, x = don?t care, z = high impedance table 2. mux truth table sl1 sl2 sl3 sl4 out1 out2 out3 out4 mode 0000in1in1in3in3 splitter 0001in1in1in3in4splitter/r epeater 0010in1in1in1in1 splitter 0011in1in1in4in4 0100in1in2in3in3splitter/r epeater 0101in1in2in3in4re peater 0110in1in2in4in3repeater/switch 0111in1in2in4in4splitter/r epeater 1000in2in2in2in2 splitter 1001in2in1in3in4switch/r epeater 1010in2in1in4in3 switch 1011in3in3in3in3 splitter 1100in2in2in3in3 1101in2in2in3in4splitter/r epeater 1110in4in4in4in4 splitter 1111in2in2in4in4 table 3. enable (en) truth table en inputs outputs (in+) - (in-) out+ out- lxzz h or floating (internal pull-up) vid 0.1 v h l vid -0.1 v l h -0.1v < vid < +0.1 v unknown full fail-safe open/short or terminated hl
pin configuration RHFLVDS228A 4/16 docid025373 rev 1 2 pin configuration figure 1. pinout 1. power supplies are not internally separated. all vcc pins must be connected to the same potential. en1 in1+ in1- en2 in2+ in2- vcc gnd in3+ in3- en3 in4+ in4- en4 enck clkin+ clkin- gnd en5 in5+ in5- en6 in6+ in6- vcc gnd in7+ in7- en7 in8+ in8- en8 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 64 63 62 61 60 59 58 57 skew match sl1 out1+ out1- sl2 out2+ out2- vcc gnd sl3 out3+ out3- sl4 out4+ out4- vcc clkout+ clkout- gnd sl5 out5+ out5- sl6 out6+ out6- vcc gnd sl7 out7+ out7- sl8 out8+ out8- mux mux
docid025373 rev 1 5/16 RHFLVDS228A maximum rating s and operating conditions 16 3 maximum ratings and operating conditions absolute maximum ratings are those values be yond which damage to the device may occur. functional operation under these conditions is not implied. table 4. absolute maximum ratings symbol parameter value unit v cc supply voltage (1) 1. all voltages, except the differential i/o bus voltage, are with respect to the network ground terminal. 4.8 v v i ttl inputs (operating or cold-spare) -0.3 to 4.8 v cm lvds common mode (operating or cold-spare) -5 to +6 t stg storage temperature range -65 to +150 c t j maximum junction temperature +150 r thjc thermal resistance junction to case (2) 2. short-circuits can cause excessive heating. destructive dissipation can result from short-circuits on the amplifiers. 20 c/w esd hbm: human body model ? all pins excepted lvds inputs and outputs ? lvds inputs and outputs vs. gnd 2 8 kv cdm: charge device model 500 v table 5. operating conditions symbol parameter min. typ. max. unit v cc supply voltage 3 3.3 3.6 v v cm static common mode - 4 + 5 t a ambient temperature range -55 +125 c
electrical characteristics RHFLVDS228A 6/16 docid025373 rev 1 4 electrical characteristics total dose (mil-std-883 tm 1019) the products guaranteed in radiation within the rha qml-v system fully comply with the mil-std-883 tm 1019 specification. the RHFLVDS228A is rha qml-v, tested and characterized in full compliance with the mil-std-883 specification, between 50 and 300 rad/s only (full cmos technology). all parameters provided in table 7: electrical characteristics table apply to both pre- and post-irradiation, as follows: ? all test are performed in accordance with mil-prf-38535 and test method 1019 of mil-std-883 for total ionizing dose (tid). ? the initial characterization is performed in qualification only on both biased and unbiased parts. ? each wafer lot is tested at high dose rate only, in the worst bias case condition, based on the results obtained duri ng the initial qualification. heavy ions the behavior of the product when submitted to heavy ions is not tested in production. heavy-ion trials are performe d on qualification lots only. table 6. radiations type characteristics value unit tid high-dose rate (50 - 300 rad/sec) 300 krad heavy ions sel immunity up to: (with a particle angle of 60 , at 125 c) 135 mev.cm2/mg sel immunity up to: (with a particle angle of 0 , at 125 c) 67 set/seu immunity up to: (at 25 c) 22
docid025373 rev 1 7/16 RHFLVDS228A electrical characteristics 16 in table 7 below, v cc = 3 v to 3.6 v, capa-load (cl) = 10 pf, typical values are at t amb = +25 c, min. and max values are at t amb = - 55 c and + 125 c unless otherwise specified. table 7. electrical characteristics table symbol parameter test conditions min. typ. max. unit whole circuit i ccl total enabled supply current, drivers and receivers enabled, not switching v id = 400 mv and load = 100 on all channels 67 80 ma i ccz total disabled supply current, loaded or not loaded, drivers and receivers disabled v id = 400 mv en and enck = gnd 20 digital inputs en, enck, and sl v ih input voltage high 2 v cc v v il input voltage low gnd 0.8 i ih high level input current v cc = 3.6 v, v in = v cc -10 10 a i il low level input current v cc = 3.6 v, v in = 0 -10 10 i off ttl inputs power off leakage current v cc = 0 v, en and sl = 3.6 v -10 10 lvds inputs v tl differential input low threshold v cm = 1.2 v -100 mv -4 v < v cm < +5 v -130 v th differential input high threshold v cm = 1.2 v +100 -4v < v cm < +5 v +130 v cmr common mode voltage range v id = 200 mvp-p - 4 +5 v v cmrej common mode rejection (1) f = 10 mhz 300 mvp-p i id differential input current v id = 400 mvp-p -10 10 a i icm common mode input current v ic = - 4 v to + 5 v -70 70 i offin lvds input power-off leakage current (2) v cc = 0 v, v in = -4 v to 5 v -60 60 c in input capacitance 3 pf lvds outputs v oh output voltage high 1.65 v v ol output voltage low 0.925 v od differential output voltage 250 400 mv dv od change of magnitude of v od for complementary output states 10 v os offset voltage 1.125 1.45 v dv os change of magnitude of v os for complementary output states 25 mv
electrical characteristics RHFLVDS228A 8/16 docid025373 rev 1 i os output short-circuit current v id = -400 mv and v out- = 0 v v id = +400 mv and v out+ = 0 v -9 ma i oz high impedance output current disabled, v out = 3.6 v or 0v -10 10 a i offout lvds outputs power-off leakage current v cc = 0 v, v out = 3.6 v -50 +50 t s input to sl setup time (3) refer to figure 4 1.6 ns t h input to sl hold time (3) 1.5 t sw sl to switched output (3) 5 t phld propagation delay time, high to low v id = 200 mvp-p, input pulse from 1.1 v to 1.3 v, v cm =1.2 v load: refer to figure 2 1.5 4 t plhd propagation delay time, low to high 1.5 4 t sk1 channel to channel skew (3)(4) v id = 200 mvp-p load: refer to figure 5 0.5 t sk2 chip to chip skew (3)(5) 0.7 t skd differential skew (6) (t phld -t plhd ) 0.5 t r output signal rise time refer to figure 3 0.9 t f output signal fall time 0.9 t plz propagation delay time, low level to high impedance output refer to figure 5 2.8 t phz propagation delay time, high level to high impedance output 2.8 t pzh propagation delay time, high impedance to high level output 2.5 t pzl propagation delay time, high impedance to low level output 2.5 fail-safe and cold-spare t d1 fail-safe to active time 1 s t d2 active to fail-safe time 1 1. guaranteed by characterization on bench. 2. all pins are floating except pin under test and v cc . 3. guaranteed by design. 4. t sk1 is the maximum delay time differ ence between drivers on the same device (with all inputs connected together). 5. t sk2 is the maximum delay time difference between outputs of a ll devices when they operate with the same supply voltage, at the same temperature. 6. t skd is the maximum delay ti me difference between t phld and t plhd ( see figure 3 ). table 7. electrical charact eristics table (continued) symbol parameter test conditions min. typ. max. unit
docid025373 rev 1 9/16 RHFLVDS228A electrical characteristics 16 cold sparing the RHFLVDS228A features a cold spare in put and output buffer. in high reliability applications, cold sparing enables a redundant device to be tied to the data bus with its power supply at 0 v (v cc = gnd) without affecting the bus signals or injecting current from the i/os to the power supplies. cold sparing also allows redundant devices to be kept powered off so that they can be switched on only when required. this has no impact on the application. cold sparing is achieved by im plementing a high impedance between the i/os and v cc . esd protection is ensured through a non-conventional dedicated structure. fail-safe in many applications, inputs need a fail-safe function to avoid an uncertain output state when the inputs are not connected properly. in case of an lvds input short circuit or floating inputs, the lvds outputs remain in stable logic-high state.
test circuit RHFLVDS228A 10/16 docid025373 rev 1 5 test circuit figure 2. voltage and current definition figure 3. timing and voltage definiti ons for differential output signal 1. all input pulses are supplied by a generator with the following characteristics: t r or t f 1 ns, f = 1 mhz, z o = 50 , and duty cycle = 50 %. 2. the product is guaranteed with c l = 10 pf. v od lvds driver lvds receiver out+ out- v os =(v out+ + v out- )/2 v cm =(v in+ + v in- )/2 v id v in+ v in- in+ in- i i 100-ohm cl=10pf cl=10pf v in+ v in- t phld t plhd 50% 50% tf v od tr 80% 20% 80% 20%
docid025373 rev 1 11/16 RHFLVDS228A test circuit 16 figure 4. mux switch timings figure 5. enable and disable waveforms 1. all input pulses are supplied by a generator with the following characteristics on en: t r or t f 1 ns, f = 500 khz, pulse width = 500 ns. in0 in1 sl out ts t h t sw in0 in1 ts t h t sw in1 in0 en t pzh 50% 50% t pzl 50% 50% t phz t plz 50% 50% v out+ or v out- v out+ or v out- v od cl=10pf 50ohm lvds output cl=10pf out+ out- 50ohm 1.2v v os
package information RHFLVDS228A 12/16 docid025373 rev 1 6 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark.
docid025373 rev 1 13/16 RHFLVDS228A package information 16 6.1 ceramic flat-64 p ackage information figure 6. ceramic flat 64 package mechanical drawing 1. the upper metallic lid is elec trically connected to ground. table 8. ceramic flat 64 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 2.41 2.66 2.92 0.095 0.105 0.115 a1 0.33 - - 0.013 - - b 0.18 0.2 0.23 0.007 0.008 0.009 c 0.15 0.2 0.25 0.006 0.008 0.010 d 20.91 21.11 21.31 0.823 0.831 0.839 e 8.64 8.76 8.89 0.340 0.345 0.350 e2 6.57 6.72 6.87 0.259 0.265 0.270 e3 - 1.02 - - 0.040 - e - 0.635 - - 0.025 - l 12.45 12.7 12.95 0.49 0.5 0.51 s1 - 0.61 - - 0.024 -
ordering information RHFLVDS228A 14/16 docid025373 rev 1 7 ordering information note: contact your st sales office for information regarding the specific conditions for products in die form and qml-q versions. 8 shipping information date code the date code is structured as follows: ? engineering model: em xyywwz ? qml flight model: fm yywwz where: x = 3 (em only), assembly location rennes (france) yy = last two digits of the year ww = week digits z = lot index of the week table 9. order codes order code description temp. range package marking (1) 1. specific marking only. complete marking includes the following: - smd pin (on qml-v flight only) - st logo - date code (date the package was sealed) in yywwa (year, week, and lot index of week) - qml logo (q or v) - country of origin (fr = france). packing RHFLVDS228Ak1 engineering model -55 c to 125 c ceramic flat-64 RHFLVDS228Ak1 strip pack RHFLVDS228Ak01v (2) 2. not yet in full production qml-v flight tbd
docid025373 rev 1 15/16 RHFLVDS228A revision history 16 9 revision history table 10. document revision history date revision changes 29-oct-2013 1 initial release
RHFLVDS228A 16/16 docid025373 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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